Posit is going to replace the venerable IEEE-754

Posit gives you better accuracy, with fewer gates, and uses half the bandwidth. Will you be ready when the transition happens?

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Handcrafted RISC-V IP

Our handcrafted RISC-V IP implements 32 bit IMAC without the overhead of HSLs

Sensonics' SR2300 is a minimal, ground up implementation of the RISC-V ISA with an extremely small footprint in any given technology.

A 32-bit pipelined 3-stage Instruction Execute Engine fully compliant to RV32I base ISA together with RV32M, A, C instructions.

Compressed instructions are packed across 16 bit boundaries and can co-exist without restriction in on-chip program memory with 32-bit instructions.

Fully compliant custom instruction extensions for a comprehensive set of mathematical functions in native hardware with the seamless integration of SR 2311, the Posit Compute Engine.

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Posit Compute Engine

Better accuracy with half the power/half the bandwidth

Sensonics' SR2311 is a Posit(32,2) Compute Engine that executes Posit instructions in hardware with accuracies better than ~10-9

Basic hardware includes arithmetic, square root, logarithm, circular and hyperbolic functions, and their inverses. The C Compiler, under development, will compile real number code directly to Posit. Also available is an approximate (single cycle) sigmoid function that can speed up many ML algorithms.

Our Posit(32,2) Compute Engine has been fully characterised for accuracy. You can download a summary of our results here.

Learn more about Posit from our tutorial.

A Quire is a special 512-bit accumulator mechanism implemented in SR2311 that eliminates the need to round after every operation and allows optimization of long computation sequences resulting in end accuracies of SR2311 comparable to IEEE754 Double Precision under similar conditions.

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Architectural Consulting

Need help integrating Posit into Domain Specific IP?

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We are just emerging from stealth mode

Stay tuned for updates.